Game of Life
ENGS 031: Digital Electronics // Professor Eric Hansen
Partner: Garrett Watumull
Project Objective and Overview
Design and implement a digital system on an FPGA using VHDL design language. The system chosen for this project was Conway's Game of Life. The game is played on a grid of cells and evolves over time based on an initial formation of cells designed by the user. The game is governed by Conway's four famous rules :
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Reproduction: Any deactivated cell with precisely three active neighbors gets reactivated.
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Overpopulation: Any active cell with over three active neighbors gets deactivated.
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Survival: Any active cell with two or three active neighbors remains in the same state.
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Underpopulation: Any active cell with fewer than two active neighbors deactivates
The game was implemented with a VGA monitor and controlled with buttons and switches on the FPGA board.
The project’s primary design feature was logic that replicates and wires together a grid of individual 32 by 32 pixel cells. Each cell then uses internal logic to implement the game’s four basic rules.
Figure 1 - Diagram of the user interface on the FPGA board
Figure 2 - Example of Conway's Game of Life. Certain formations will remain static (cube of four cells), oscillate in place (three cell bars), propagate indefinitely ("ship"), or eliminate itself.
Design and Implementation
This particular implementation of Conway's Game of Life implements the game logic by creating an individual cell to execute Conway’s logic. This parent cell is then replicated enough times to achieve a 15 by 32 cell grid with each replicated cell wired to its eight adjacent neighbors. The replication method was implemented in contrast to one using memory.
Functional Description
Users activate specific cells displayed on a grid. The user may activate any combination of cells they wish. Once the game has started each cell will analyze the status of its eight neighbors and either deactivate (die), activate (live), or remain in the same state (survive) based on the number of activated or deactivated neighbors
Figure 3 - Project block diagram: includes the overall system controller logic, two counters to increment through the VGA monitor pixels, the VGA controller, the counter that updates the Game of Life grid of cells, and the cell colony logic that implements the game logic
Individual Cell Logic
An individual cell operates through the analysis of the current activation state of its eight neighbors and its own current activation status (status a). The current status signal passes through logic to assign an updated status signal when the cell status register is enabled by either the toggle signal or the update signal from the system’s controller. The cell outputs a current status signal from its internal register and a status history signal (signal b) to indicate that the cell had been previously activated and will then be deactivated when updated.
Figure 4 - Block diagram displaying the logic used to implement the cell logic for a single cell. The eight input signals are the digital status signal from a cell's eight adjacent neighbors. The output signals are the status signal of the current cell (status a) and a status history signal (status b) of what status the cell was previously
Colony Logic
To implement the game of life, the cell-colony block generates an array of interconnected cells. These cells are wired together so that each may properly update based upon the current activation status of its eight neighbors. Additionally, the cell colony must be able to access individual cells for toggling and must also read the status of individuals cell based upon the horizontal and vertical display counter values provided by the VGA controller.
Final Game of Life
The final version of the game was implemented on a 15 by 32 grid. By using the direction buttons on the FPGA board, the user was able to set up any formation they wished, clear their formation, view cells that had previously been "alive" but were now "dead", pause the game and edit their formation, and reset the entire game.
Grid size was limited by the capacity of the FPGA to implement the game logic. A larger grid would have required more look up tables (LUTs) to implement the logic required for a larger number of cells.